Passive voltage contrast (PVC) is a failure analysis tool which can be used to detect defects and failure mechanisms in complementary metal oxide semiconductor (CMOS) ICs such as a gate oxide breakdown. In the PVC method, a scanning electron microscope (SEM) can be used to direct a beam of electrons onto the IC which is located on a stage in a vacuum chamber, with a substrate on which the IC is formed being electrically grounded. The beam of electrons incident on the IC produces secondary electrons which can be detected to form a PVC image of the IC. The amount of secondary electrons generated in the IC will depend upon local electric fields in and near the surface of the IC, with the electric fields, in turn, depending upon the presence or absence of electrically conducting paths between circuit elements of the IC and the electrically-grounded substrate. Variations in the local electric fields (termed voltage contrast) result in variations in image contrast and are responsible for certain areas of the IC such as gate oxide regions appearing relatively bright (i.e. light) in the PVC image when there is an electrical breakdown therein which forms a conductive path to the grounded substrate, or relatively dark in the absence of any electrical breakdown.
Conventional wisdom has held that the PVC method cannot be performed on electrically-floating ICs such as ICs fabricated on SOI substrates which include a silicon device layer (also termed a body) separated from an underlying silicon substrate by an intervening electrically-insulating oxide layer. In order to apply the PVC method to SOI devices, the body, which is electrically isolated from the substrate, must be electrically grounded in some way. Electrically grounding the body of a SOI device while performing PVC analysis requires extensive pre-processing.
When the PVC analysis is performed on a top side of the SOI device, the device layer must be electrically grounded to the substrate below. This requires removing the various layers of interconnect metallization from the top side of the SOI device. Then additional pre-processing is required to mechanically grind through the silicon substrate from a bottom side thereof, followed by etching through the oxide layer to expose a portion of the body, and then applying an electrically conductive coating over the exposed portion of the body, oxide layer and substrate to form an electrical connection between the body and the electrically grounded substrate (see U.S. Pat. No. 6,960,802).
Performing PVC analysis from the bottom side of a SOI device has also been performed. However, this also requires extensive pre-processing as described in U.S. Pat. No. 6,991,946. In this case, electrical grounding of the body of a packaged SOI device is simplified since one or more pins on the IC package can be used to electrically ground the body. However, in a packaged device, access of the electron beam to the body requires grinding through the substrate from the bottom side, and then etching through the oxide layer to expose the body.
Another PVC method which has been applied to electrically-floating ICs requires the use of two alternating pulsed charged particle beams (e.g. electron beams) with different electron beam energies which are directed to two different portions of the IC to detect continuity defects between any two closely-spaced conductors (see U.S. Pat. No. 6,906,538). One of the charged particle beams creates a stream of secondary electrons at the particular component that the beam is striking; and the other charged particle beam is of a sufficiently elevated voltage to provide an electrical charge at the particular component that it is striking. To avoid interference between the two beams, an alternating pulsating sequencing of the two beams is necessary. This method is complicated and requires a specialized dual-beam system to provide the two pulsed charged particle beams.
The present invention overcomes the limitations of the prior art by providing a PVC system and method that can be used to analyze ICs for defects and failure mechanisms without extensive pre-processing.
The PVC system and method of the present invention, which is referred to as floating-substrate PVC or FSPVC, does not require electrical grounding of the device side of an IC, and can be applied to both bulk semiconductor substrates and SOI substrates.
The PVC system and method of the present invention simplifies pre-processing prior to analysis, and can also be performed using only a single charged particle beam (e.g. a single electron or ion beam).
These and other advantages of the present invention will become evident to those skilled in the art.